The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Generally, in a scan test enabled circuit, flip-flops in the circuit are configured to form one or more scan chains in a test mode. The scan chains are then used to shift test patterns in the circuit or shift test results out of the circuit to improve control and observability for testing.